Auto-detect feedback RC constant on startup
This firmware works best with capacitor values ~20x smaller than are found on almost all ESCs. However, this could be tuned for by adjusting the new TIMING_OFFSET feature. It could be calculated as follows:
Turn on channel A,B,C Low-side. Wait ~1ms for all capacitors to discharge Turn off channel A Low-side Wait ~20us for FET to switch (larger than necessary, to be safe) Turn on channel A High-side Wait ~1ms for capacitors to charge and virtual neutral to shift Turn off channel B Low-side Wait ~20us for FET to switch Start timer Turn on channel B High-side compare on channel B vs virtual neutral Capture timer value on crossing. This should be an accurate representation of the delay from the capacitors and FET switching. If it takes more than 1 ms cut out for safety reasons, assume timer value of 0 or give an error
Edit: This process actually measures the delay that the switching and capacitors cause in similar conditions to what is happening when the motor is running, so it should be more accurate than the other way I was doing it.
Hello! I had considered this before, but so far I have found that the lag induced by the filtering hasn't really been the cause of any problems, just a few degrees of timing at typical speeds. The sync problems with some motors seems to have been more related to the ZC filtering than the actual exact timing. On the other hand, it would certainly be nice to automatically compensate for the lag so that (in theory) the timing wouldn't change regardless of capacitance. The end result being that the efficiency and maximum motor speed for a particular voltage would not change just because of the amount of capacitance.
Some boards take a very long time (many microseconds) just to turn on a high-side FET. Were you looking at driving the sense lines before? The hardware checking code I put in a while back already does this and this already has to delay to compensate for capacitance. Maybe it would be enough to do it that way, as long as it can still provide enough signal for the comparator. Or perhaps some sort of equivalent-time sampling with the ADC.
What I wrote above could be done the other way as well to avoid the slow high-side FET turn-on:
Turn on channel A,B,C Low-side. Wait ~1ms for all capacitors to discharge (and n-FET driver capacitors to charge) Turn off channel A & B Low-side Wait ~20us for FET to switch (larger than necessary, to be safe) Turn on channel A & B High-side Wait ~20us for capacitors to charge and virtual neutral to shift Turn off channel B high-side Wait ~20us for FET to switch Start timer Turn on channel B low-side compare on channel B vs virtual neutral Capture timer value on crossing. This should be an accurate representation of the delay from the capacitors and FET switching. If it takes more than 1 ms cut out for safety reasons, assume timer value of 0 or give an error
I did have a way to measure the RC by driving the sense lines, but it is tricky and requires two different measurements and some math because the grounded resistor on the voltage divider means you can't measure it directly. It was by driving the sense lines, then turning them into comparator inputs relative to the band-gap and waiting for them to cross due to capacitor discharge through the resistors. However, I thought it might be important to include the FET switching delay because that also affects how long the actual motor switching takes to happen, and the FET delay also retards motor timing so it should be included in the same timing offset.
The thing with the capacitance/fet switching is that it is a fixed delay, so at higher RPM it will have more effect. Those motors with higher pole count will have a much higher electrical RPM, so it would affect them more. Not only that, but the higher pole-count motors also tend to have all the poles wound in series to avoid circular currents so they also have higher L, making the higher timing even more critical, because the slow ramp-up/down of the current caused by the high L causes the effective timing to lag even further.
Slightly OT, but the best for those high-pole motors would be if we could somehow measure the L of the motor windings and automatically adjust the timing/ZC checks based on that. There could be ~3 different timing/ZC settings, one of which is chosen depending on the result. Maybe by pulsing a the motor briefly (maybe 10us), then turning off all FETs and waiting for the current to die by going through the FET diodes and seeing how long that takes would give an idea of the inductance. The trouble is that the circulating current would push the sense line below 0V because there would be a voltage drop relative to ground. Also it might drop too quickly to measure with the ADC, and I can't think of a way of causing a crossing relative to the virtual neutral.
Hmmm. Reading up on your first ZC filter attempt, it seems that the noise is introduced by the high-side FET acting as a diode and the switching noise was blinding the ZC filter. Isn't this something COMP_PWM would help with? Either that, or you could have a mode which does high-side switching instead (for those ESCs that can handle it), possibly linked to COMP_PWM.