Low-level optimizations (spinlocks, atomics)

[tobias-schuele]

Proposals for reducing overhead when processing extremely small tasks (to be discussed):

• Align embb_atomic_int atomic_spin_variable_ using EMBB_PLATFORM_ALIGN (central definition of cache line size woud be useful as well as an additional macro for padding, e.g. EMBB_PLATFORM_ALIGN_PADDING; background: the aligned variable may be followed by an unaligned one for which reason char padding[CACHE_LINE_SIZE-SIZEOF(var)] should follow)
• Inline atomics on Windows (problem: inline assemblies not supported on x86_64, solution: compiler intrinsics?)
• Release spinlock without mfence (requires explicit barrier specification for atomics)
• Inline spinlock functions (lock/unlock) to avoid function calls