Detecting TBM support

[gnzlbg]

See this: https://support.amd.com/TechDocs/25481.pdf

Note: In ExtendedProcessorSignature the ecx register lzcnt (5th bit) value denotes ABM support in AMD CPUs (and also on Intel CPUS, lzcnt is the only instruction they were missing from ABM support). The 21th bit of the ecx denotes TBM support in AMD CPus.

[shepmaster]

This isn't an enhancement, but a bug report:

I also found some inconsistencies with respect to popcnt / lzcnt / abm that AFAICT none of the libraries handle properly.

[gnzlbg]

So this is a dump of all I know:

• popcnt and lzcnt have different feature flags
• on AMD the lzcnt flag is used to indicate ABM (which is both popcnt + lzcnt),
• lzcnt is also part of BMI1, on intel lzcnt indicates bmi, and bmi indicates lzcnt
• some AMD CPUs support ABM but not BMI1
• popcnt on intel is part of SSE 4.2 and on AMD part of SSE4a

Thinking more about this just because on AMD lzcnt indicates both lzcnt and popcnt does not mean that popcnt cannot be used there to check for popcnt support. So I don't think there is any bug here. Many ways to check for the different feature is correct. I was probably just confused thinking that the AMD CPUs that support ABM but not BMI1 could not check popcnt via the popcnt flag.

The only thing that holds is the missing support for checking TBM but that is a feature request, not a bug.

[gnzlbg]

@shepmaster I screwed up the detection of tbm support. I implemented it so that it checks the bit for all vendors, but it should only do so for AuthenticAMD. Intel defines the TBM bit as reserved, and it does not implement the TBM instructions, resulting into SIGILLs when these are used.

[gnzlbg]

It seems that this is not that bad, since intel sets the TBM bit to zero though.