Ilia Sergachev

Where is the CVA6 wrapper?

4

CVA6 support requires a couple of files: https://github.com/enjoy-digital/litex/blob/master/litex/soc/cores/cpu/cva6/core.py#L156 An attempt to run `litex_sim --cpu-type=cva6` reports Flist.cv64a6_imafdc_sv39 as missing - this is easy to fix by prefixing its path with `core/`...

Separate address maps for CPU and SoC?

5

Some hard CPU cores (Zynq-7000, EOS S3) do address translation on peripheral buses - say for the CPU addresses of a bus start at 0x40020000 and CSR_BASE C definition has...

Hang on "Enable configuration:" programming ECP5 not alone on a JTAG chain

17

I have a board with 2 FPGAs on the JTAG chain: ``` ./openFPGALoader --detect write to ram Jtag frequency : requested 6.00MHz -> real 6.00MHz index 0: idcode 0x1112043 manufacturer...

picmg: add heartbeat and channel control commands

1

Add a couple of commands to talk to power supplies: heartbeat and output channel control.

ARP: resolve IP multicast

3

According to [RFC1112](https://tools.ietf.org/html/rfc1112), addresses 224.0.0.0 – 239.255.255.255 (starting 0b1110) should be resolved by placing the low-order 23-bits of the IP address into the low-23 bits of the Ethernet multicast address...

EQ0, EQ1, HPD, CEC - all connected to ECP5. HDMI itself and HDMI I2C already tested.

It's more granular than the existing --xla_gpu_deterministic_ops because it allows doing an autotuning compilation with non-deterministic ops disabled. --xla_gpu_deterministic_ops is a superset of --xla_gpu_exclude_nondeterministic_ops, so --xla_gpu_deterministic_ops=true will be setting --xla_gpu_exclude_nondeterministic_ops=true...

[GPU] Enable cuDNN GEMM fusion level 3 by default.

9

Affects only Hopper+ and cuDNN 9+: https://github.com/openxla/xla/blob/fb41b76a8b08216b80abb49ceb5c07373d9c45c5/xla/service/gpu/gemm_fusion_autotuner.cc#L556. Description of fusion level 1: https://github.com/openxla/xla/blob/fb41b76a8b08216b80abb49ceb5c07373d9c45c5/xla/xla.proto#L742.