Joachim Strömbergson
Joachim Strömbergson
This PR is first attempt att fixing #219. Needs review and checks. The build of the FPGA gives different results with the patch compared to main. The build should not...
This PR adds the ability for apps to lock down CDI access, limiting exposure to CDI by other apps, mem leaks etc. Basically the CDI can be read until a...
This PR improve initial RAM randomization by adding the xorwow variant of Marasaglia xorshift PRNG as data generator. Closes #162
This adds a simple sim model of the SB_LUT4 instance, that allows for linting of the UDS core without blowing up. Building of the sim target breaks due to change...
This PR adds the ability for SW to read the sampled input from the touch sensor. That allows SW to detect a finger present, and with the aid of the...
In order to be able to switch device applications, we need a mechanism that allows the client to perform a reset of the connected TKey device. The idea is to...
This feature adds the ability for the application FPGA to receive an external request to perform an internal HW reset, thereby return to FW mode and reboot. The feature also...
The UDI and UDS are implemented using named instances of SB_LUT4s in the FPGA. This is all well and good. But LUT inputs are implicitly specified (in UDI). One input...
The application_fpga currently meets 24 MHz after P&R, but is clocked at 18 MHz. We should be able to increase the clock to ~22 MHz and still have good timing...
Looking at the Community status for the project, there seems to be things that we could improve: 