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RB edesigns' `truncate_to_available_data` fails to truncate auxiliary information
MirrorRBDesign.truncate_to_available_data truncates the the edesign's circuit_lists, but it does not truncate idealout_lists. This means that the mapping between circuits and target bit strings is lost.
Example notebook attached.
Expected behavior: Returned edesign should have idealout_lists that contain exactly the idealouts of the circuits remaining in the truncated design.
Based on skimming the code I suspect other RB protocol edesigns have an analogous issue.
Environment:
- pyGSTi v0.9.12.1
- python 3.8