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Noncontiguous register clusters result in name collisions
In the LPC178x7x.svd file (which has a bucket of other problems besides), I discovered that the PWM0 match registers are not contiguous, and will cause a name collision. To wit,
15160 <registers>
...
15759 <register>
15760 <dim>4</dim>
15761 <dimIncrement>0x4</dimIncrement>
15762 <dimIndex>0-3</dimIndex>
15763 <name>MR%s</name>
15764
15765 <description>Match Register. Match registers
15766 are continuously compared to the PWM counter in order to control PWM
15767 output edges.</description>
15768 <addressOffset>0x018</addressOffset>
15769 <access>read-write</access>
15770 <resetValue>0</resetValue>
15771 <resetMask>0xFFFFFFFF</resetMask>
15772 <fields>
15773 <field>
15774 <name>MATCH</name>
15775 <description>Timer counter match value.</description>
15776 <bitRange>[31:0]</bitRange>
15777 </field>
15778 </fields>
15779 </register>
...
(other registers defined here)
...
16134 <register>
16135 <dim>3</dim>
16136 <dimIncrement>0x4</dimIncrement>
16137 <dimIndex>4-6</dimIndex>
16138 <name>MR%s</name>
16139
16140 <description>Match Register. Match registers
16141 are continuously compared to the PWM counter in order to control PWM
16142 output edges.</description>
16143 <addressOffset>0x040</addressOffset>
16144 <access>read-write</access>
16145 <resetValue>0</resetValue>
16146 <resetMask>0xFFFFFFFF</resetMask>
16147 <fields>
16148 <field>
16149 <name>MATCH</name>
16150 <description>Timer counter match value.</description>
16151 <bitRange>[31:0]</bitRange>
16152 </field>
16153 </fields>
16154 </register>
will result in multiple pub mod mr and pub struct Mr statements being emitted.