Funky match statement on incorrect svd

[sajattack]

The svd for ATSAMD51J19A has an incorrect bit width of 1 on some of the gclk::syncbusy registers, and this causes svd2rust to produce really weird true => match statements like this https://github.com/atsamd-rs/atsamd/blob/master/pac/atsamd51j19a/src/gclk/syncbusy/mod.rs#L99-L113 cc @jamesmunns @wez

[jamesmunns]

The XML for this code looks like this:

<field>
  <name>GENCTRL0</name>
  <description>Generic Clock Generator Control 0 Synchronization Busy bits</description>
  <bitOffset>2</bitOffset>
  <bitWidth>1</bitWidth>
  <access>read-only</access>
  <enumeratedValues>
    <name>GENCTRL0Select</name>
    <enumeratedValue>
      <name>GCLK0</name>
      <description>Generic clock generator 0</description>
      <value>0x1</value>
    </enumeratedValue>
    <enumeratedValue>
      <name>GCLK1</name>
      <description>Generic clock generator 1</description>
      <value>0x2</value>
    </enumeratedValue>
    <enumeratedValue>
      <name>GCLK2</name>
      <description>Generic clock generator 2</description>
      <value>0x4</value>
    </enumeratedValue>
    <enumeratedValue>
      <name>GCLK3</name>
      <description>Generic clock generator 3</description>
      <value>0x8</value>
    </enumeratedValue>
    <enumeratedValue>
      <name>GCLK4</name>
      <description>Generic clock generator 4</description>
      <value>0x10</value>
    </enumeratedValue>
    <enumeratedValue>
      <name>GCLK5</name>
      <description>Generic clock generator 5</description>
      <value>0x20</value>
    </enumeratedValue>
    <enumeratedValue>
      <name>GCLK6</name>
      <description>Generic clock generator 6</description>
      <value>0x40</value>
    </enumeratedValue>
    <enumeratedValue>
      <name>GCLK7</name>
      <description>Generic clock generator 7</description>
      <value>0x80</value>
    </enumeratedValue>
    <enumeratedValue>
      <name>GCLK8</name>
      <description>Generic clock generator 8</description>
      <value>0x100</value>
    </enumeratedValue>
    <enumeratedValue>
      <name>GCLK9</name>
      <description>Generic clock generator 9</description>
      <value>0x200</value>
    </enumeratedValue>
    <enumeratedValue>
      <name>GCLK10</name>
      <description>Generic clock generator 10</description>
      <value>0x400</value>
    </enumeratedValue>
    <enumeratedValue>
      <name>GCLK11</name>
      <description>Generic clock generator 11</description>
      <value>0x800</value>
    </enumeratedValue>
  </enumeratedValues>
</field>

[sajattack]

Changing the bit width seems to produce better output. https://github.com/sajattack/atsamd/commit/21486572108eb2fe610ba82206c6f73441b152ce#diff-e53788b3cacad275e699ca661b8f2dcc But probably svd2rust should fail or warn when it detects svds like this.

[burrbull]

Should already be fixed. Returns error

[RavuAlHemio]

For what it's worth, I've performed a quick run-through of the SVD files in the SAM packs on packs.download.microchip.com and reported the inconsistencies that made svd2rust generation fail (impossible enum values due to field bit width, impossible values-on-reset due to field bit width) to Microchip. The support technician seemed receptive; perhaps future pack releases will contain officially fixed SVDs.