implement memory pool using LL/SC operations

[japaric]

this changes the implementation of the underlying Treiber Stack to use LDREX and STREX on Cortex-v7A/R/M. other architectures are left unchanged in this PR. in principle, RISC-V could be implemented in a similar fashion but haven't tested that yet

this does bump the MSRV so it's technically a breaking change ...

to make this easier to maintain I'd like to drop the llsc.rs and make pool only available on targets where it implements Sync and it's sound but that's a API breaking change. there are other API breaking changes I'd like to make (e.g. remove the Uninit type state) so I'll write a RFC first

fixes #180