SCB.ICSR.VECTACTIVE is RES0 on armv8m-baseline w/o halting debug

[taralx]

I know it's a weird combo (no halting debug is rare), but if we read this from IPSR instead of ICSR we avoid the problem altogether.

https://github.com/rust-embedded/cortex-m/blob/1a215916eeebdf96d4530e0afb1baa91b93eefb7/cortex-m-rt/macros/src/lib.rs#L227