Pull out reusable semihosting code into its own crate

[japaric]

or refactor common code into another crate to make it easier to port to other architectures

basically the only thing that needs to change to make this semihosting library work on other architectures is the assembly used to make the semihosting "system call". On Thumb-only ARM the syscall is BKPT 0xAB; on ARM-state ARM it's SVC 0x123456; on RISC-V it's a set of 3 instructions; etc.

I have tested a port of this library (just changed the syscall function) on real RISC-V hardware with OpenOCD and it works. I would it to work on any OpenOCD setup since the host-side of semihosting is implemented in OpenOCD.

Similarly, this library (with syscall changed) works on a QEMU-lated Cortex-A core and I would expect it to work on any architecture that QEMU supports.

The thing that's not straightforward to port is h(e)println!, who's implementation is unsound (#49) in multi-core machines. I would simply leave that API out for other architectures.

[jonas-schievink]

Looks like the RISC-V people already forked this library: https://github.com/riscv-rust/riscv-semihosting

[thalesfragoso]

The issue referenced is actually: https://github.com/rust-embedded/cortex-m-semihosting/issues/49 Problems of moving repos, I guess.