cortex-m
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Tracking issue for cache maintenance operations
After #232 there are a few outstanding issues:
- Should any other (or all) cache maintenance operations be rewritten in assembly?
- This is necessary if the branch instructions inserted when calling DSB or ISB could cause UB
- Or if some other subtle condition we haven't noticed requires it
- Should any/all of the operations be static, instead of requiring an
&mut SCB
?