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Published 20 hours ago • verified publisher icon rusefi

JLC orientation drama

Open rusefi opened this issue 4 years ago • 1 comments

We need a solution for orientation drama. Each CPL file has it's own orientation differently and each order is the same or similar stress of Q and A from JLC

There must be a way for us to at least validate our own files without JLC poking into this?

attaching known good 0.4.7 orientation rusEFI-Micro_R0 4 7-polarity

https://raw.githubusercontent.com/rusefi/rusefi_documentation/master/Hardware/microrusefi/Hardware_microRusEfi_0.5.0_pre_assembled_front.jpg is a known good image for reference

does JLC placement preview provide the information we need to self-validate?

rusefi avatar Jun 12 '20 15:06 rusefi

This seems redundant with https://github.com/rusefi/hw_microRusEfi/issues/186

jharvey avatar Aug 08 '20 11:08 jharvey