Placement freezes with only one reg

[tlf30]

Hello, I was building test cases for a project I was working on, and one of my test cases has a single reg in it. A very simple design (or so I thought). But it does not seem to work, graywolf freezes when trying to run placement. So I thought I must have been stupid and just wrote bad code? After several other test cases with one reg that failed, and after adding a second reg to them made them work, I figured that i might mention it here.

An interesting note: CPU is at 100% for the thread that graywolf is running on when frozen.

Here is verilog file. I was running the latest version of qflow. Everything else works great as always!

     module test(
             clock, reset, a, b
     );

     input clock, reset, a;
     output b;

     reg storage0;

     always @ (posedge clock) begin
             if (a) begin
                     storage0 <= 1'b1;
             end
     end

     always @ (negedge reset) begin
             storage0 <= 1'b0;
     end
     endmodule

Sorry about code formatting, it was not cooperating.