rockchip-linux
Sunchip RK3288 Board (AD-B02-V1.1)
can anybody help to make the UART working on this board. the board has UART1, 3 and 4. it doesn't have UART2 which is Rockchip standard. is there any changes required in the uboot to get this UART working ? No Support got from Sunchip folks.
@msmsubair you can change in uart address in defconfig, then enable uart node in dts, change stdout-path in dts choosen node
not sure whether issue raised in github are notified to rockchip, couldn't see any response for the issue so far
are you talking about u-boot/arch/arm/dts/rk3288-u-boot.dtsi ? idid try that
};
chosen {
stdout-path = &uart2;
u-boot,spl-boot-order = &emmc, &sdmmc;
};
};
&uart2 { clock-frequency = <24000000>; u-boot,dm-pre-reloc; status = "okay"; }; but it didnt help
CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_BASE=0xff690000 to change to desired UART , correct, thank you
i tried this and now at least i can see some characters in the console with 115200, see below, any idea why this console not showing properly.
Terminal ready (eey����7%%933�9���������7%%933�3��������������#-#1���;=7�y[y��-#1�753='�5#-!#%5#�����j:����!�15�55�9!#!'�������Q=#��9=#��3-#7�9!##59�7-5��s=-'57�!�3!#7�==-'=;'5�7�!5��m#�����5-='��a����5-='��u����5-='��e!75'��u;�[i������FDKQz��!�=--!#�����ai��%%9��-�95#�75-95��7!A)-%1A5�3!#7�mw{�-#�Yw9=��{!!�3!%�Yw9=��{!!75��%%9�������e/5/!'7�%-9!!'��3=-'57��5������eey���g51=95=7��)5 #9�)5'��=%��5#5���������io���;!!�%!75��c!#5��ygi��� ��-#-���������io ��)5'��c�}��뿿=''���������io �뿿7''��������io �뿿9''��������io �뿿1''��������io �뿿#''�������io �뿿=9')A;��������io ��c5����y���#-#1��5/53�!�!�=!;!!��yW[g�y�������������������^HE����=��=���5/���5/533��������o-�)5
Could be clock or pinmux setting.
- try different baudrate in the host putty or minicom if it works, could be clock settings
- check the pinmux of uart
miqi.dts
/dts-v1/; #include "rk3288-miqi.dtsi"
/ { model = "mqmaker MiQi"; compatible = "mqmaker,miqi", "rockchip,rk3288";
chosen {
stdout-path = "serial1:115200n8";
};
};
&pinctrl { u-boot,dm-pre-reloc; };
&uart1 { u-boot,dm-pre-reloc; reg-shift = <2>; };
RK3288-dtsi
uart0: serial@ff180000 { compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart"; reg = <0xff180000 0x100>; interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; clock-frequency = <24000000>; clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; clock-names = "baudclk", "apb_pclk"; pinctrl-names = "default"; pinctrl-0 = <&uart0_xfer>; status = "disabled"; };
uart1: serial@ff190000 {
compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart";
reg = <0xff190000 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <24000000>;
clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
clock-names = "baudclk", "apb_pclk";
pinctrl-names = "default";
pinctrl-0 = <&uart1_xfer>;
status = "disabled";
};
uart2: serial@ff690000 {
compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart";
reg = <0xff690000 0x100>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <24000000>;
clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
clock-names = "baudclk", "apb_pclk";
pinctrl-names = "default";
pinctrl-0 = <&uart2_xfer>;
status = "disabled";
};
uart3: serial@ff1b0000 {
compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart";
reg = <0xff1b0000 0x100>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <24000000>;
clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
clock-names = "baudclk", "apb_pclk";
pinctrl-names = "default";
pinctrl-0 = <&uart3_xfer>;
status = "disabled";
};
uart4: serial@ff1c0000 {
compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart";
reg = <0xff1c0000 0x100>;
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <24000000>;
clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
clock-names = "baudclk", "apb_pclk";
pinctrl-names = "default";
pinctrl-0 = <&uart4_xfer>;
status = "disabled";
};
uart0 { uart0_xfer: uart0-xfer { rockchip,pins = <4 16 RK_FUNC_1 &pcfg_pull_up>, <4 17 RK_FUNC_1 &pcfg_pull_none>; };
uart0_cts: uart0-cts {
rockchip,pins = <4 18 RK_FUNC_1 &pcfg_pull_none>;
};
uart0_rts: uart0-rts {
rockchip,pins = <4 19 RK_FUNC_1 &pcfg_pull_none>;
};
};
uart1 {
uart1_xfer: uart1-xfer {
rockchip,pins = <5 8 RK_FUNC_1 &pcfg_pull_up>,
<5 9 RK_FUNC_1 &pcfg_pull_none>;
};
/*uart1_cts: uart1-cts {
rockchip,pins = <5 10 RK_FUNC_1 &pcfg_pull_none>;
};
uart1_rts: uart1-rts {
rockchip,pins = <5 11 RK_FUNC_1 &pcfg_pull_none>;
};*/
};
uart2 {
uart2_xfer: uart2-xfer {
rockchip,pins = <7 22 RK_FUNC_1 &pcfg_pull_up>,
<7 23 RK_FUNC_1 &pcfg_pull_none>;
};
/* no rts / cts for uart2 */
};
uart3 {
uart3_xfer: uart3-xfer {
rockchip,pins = <7 7 RK_FUNC_1 &pcfg_pull_up>,
<7 8 RK_FUNC_1 &pcfg_pull_none>;
};
uart3_cts: uart3-cts {
rockchip,pins = <7 9 RK_FUNC_1 &pcfg_pull_none>;
};
uart3_rts: uart3-rts {
rockchip,pins = <7 10 RK_FUNC_1 &pcfg_pull_none>;
};
};
uart4 {
uart4_xfer: uart4-xfer {
rockchip,pins = <5 12 3 &pcfg_pull_up>,
<5 13 3 &pcfg_pull_none>;
};
uart4_cts: uart4-cts {
rockchip,pins = <5 14 3 &pcfg_pull_none>;
};
uart4_rts: uart4-rts {
rockchip,pins = <5 15 3 &pcfg_pull_none>;
};
};
RK3288-uboot-dtsi */
/ { aliases { mmc0 = &emmc; mmc1 = &sdmmc; };
chosen {
stdout-path = &uart1;
u-boot,spl-boot-order = &emmc, &sdmmc;
};
};
&uart1 { clock-frequency = <24000000>; u-boot,dm-pre-reloc; status = "okay"; };
basically all board dtsi file have same config for uart 0-4. the baud rate is alreday set at 115200 i changed to uart1 and 3, both are showing same weird characters.
rts and cts should be disable. I could see that you did it for uart1. rockchip is new for me and I never worked on rk3288, I raised another issue for rk3128 and unfortunately just clicked your issue to see any reply from rockchip :)
i was able to configure the UART 4, infact the pin was wrong in uboot, corrected it and now it is booting.
wrong one
uart4 { uart4_xfer: uart4-xfer { rockchip,pins = <5 12 3 &pcfg_pull_up>, <5 13 3 &pcfg_pull_none>;
correct one
uart4 { uart4_xfer: uart4-xfer { rockchip,pins = <5 15 3 &pcfg_pull_up>, <5 14 3 &pcfg_pull_none>;
now the next issue board shows starting kernel .............. tried to do the same changes in dts/dtsi files on Kernel. no success