VerilogCreator
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VerilogCreator is a QtCreator based IDE for Verilog 2005
As I mentioned in https://github.com/SymbiFlow/ideas/issues/17 there is a C++ library for parsing SDF files at https://github.com/kmurray/libsdfparse This library [comes from by Verilog to Routing project](https://verilogtorouting.org/). It might make sense to...
A big part of writing reliable Verilog designs is specifying things like timing constraints. The most popular format for constraints is called [SDC - Synopsis Design Constraints](http://www.vlsi-expert.com/2011/02/synopsys-design-constraints-sdc-basics.html). Variants of the...
Edalize https://github.com/olofk/edalize is a library for creating project/setup files for EDA tools from a tool-agnostic data structure. VerilogCreator could output an edalize structure (as yaml/json/xml) and let Edalize handle the...