Cwerg

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thread tests are flaky

2

robertmuth

add opcode for tracking source code location (line number + file)

1

This should enable simple debugging, e.g. stack traces.

robertmuth

This should be very similar to either the a32 or a64 backend. Some advise how to go about writing a new backend can be found here: https://github.com/robertmuth/Cwerg/blob/master/Docs/backend_porting.md

robertmuth

make 64bit fp reg d16-31 available on a32 backend

1

but only if those are available on a raspi 3

robertmuth

add x86 instruction simplifier

1

The simplifier accepts an x86 instruction and returns a semantically equivalent but "better" x86 instruction. "better" usually means short encoding. This would be implemented in CpuX64/ in a table driven...

robertmuth

robertmuth

In the C++ version each Const has an associated DK but in Python we just use "float" for F32/F64 and "int" for the rest.

robertmuth

Reference: https://community.arm.com/developer/tools-software/oss-platforms/b/android-blog/posts/arm-neon-programming-quick-reference Most operations are support except division: https://community.arm.com/developer/tools-software/tools/f/armds-forum/930/division-with-neon

robertmuth

This applies to A64 (fmov, vmov) and A32 (vmov) Currently all these constants are loaded from memory which is quite inefficient.

robertmuth

finalize the semantics of those opcodes with potentially undefined behavior

1

* mod with signed ints * div/mod with zero divisors * shifts with shift amounts exceeding the bitwidth of the operand * conversions that widen and change from signed to...

robertmuth