sail-riscv
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Add support for the Zvksed extension
Implements the Zvksed (ShangMi Suite: SM4 Block Cipher) extension, as of version Draft: 20230303
The following instructions are included:
- vsm4k.vi
- vsm4r.[vv,vs]
All instructions were tested with VLEN & ELEN being manually adjusted; results were compared with QEMU results of each instruction.
Current revision is rebased with the latest changes of vector-dev branch.
Updated the PR:
- Correction on iterating based on the specification
- Correctly Load & Store from/to vector registers
This update is adjusting the implementation to match the Spike implenentation and as a follow-up, ACT Signatures matching.
Rebased from vector-dev branch.
Unit Test Results
712 tests ±0 712 :heavy_check_mark: ±0 0s :stopwatch: ±0s 6 suites ±0 0 :zzz: ±0 1 files ±0 0 :x: ±0
Results for commit f4d9b881. ± Comparison against base commit 58729080.
:recycle: This comment has been updated with latest results.
Moved to #848.