sail-riscv
sail-riscv copied to clipboard
VSSUBU doesn't set vxsat
This code is missing vcsr[vxsat] = 0b1;
VV_VSSUBU => {
if unsigned(vs2_val[i]) < unsigned(vs1_val[i]) then zeros()
That code looks a bit suss to be honest - why is VV_VSSUBU so different to VV_VSSUB?
Same for VX_VSSUBU.