riscv-v-spec
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Setting vstart for an imprecise trap caused by an asynchronous interrupt
The start of chapter 17 states all traps always write vstart
.
On a trap during a vector instruction (caused by either a synchronous exception or an asynchronous interrupt) ... the vstart CSR contains the element index on which the trap was taken.
The section on imprecise traps explicitly reiterates this for synchronous exceptions, but not for asynchronous interrupts. I'm not sure if asynchronous interrupts have been deliberately excluded from this statement.
Imprecise traps shall report the faulting element in vstart for traps caused by synchronous vector exceptions.
If an implementation encounters an asynchronous interrupt, and decides to trigger an imprecise trap while a vector instruction is partially completed, is it always required to set vstart
?
If that is the case, it would be beneficial to change the wording of the imprecise traps section to include asynchronous interrupts.
Thanks, Samuel