riscv-plic-spec
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riscv
Why does the PLIC not support interrupt masking?
Why does the PLIC not support interrupt masking? Interrupts can only be enabled/disabled or claimed and completed. It would be nice to have an explanation why explicit masking is not needed and/or implementing this discouraged. It is a trade-off to reduce gate count because it should happen in software?
I am not clear about the original design concept of PLIC. But what do you mean exactly regarding the interrupt masking? I thought to disable an interrupt is sort of masking it out, no?
Masking and disabling are different things. When you disable an interrupt in the PLIC, any interrupts from that source will be ignored - so interrupts are lost effectively. If you mask an interrupt, it remains enabled, but will not be reported as pending external interrupt to the core. It can also not be claimed. It should be visible in the pending register for manual polling (and debugging purposes) . Now when you unmask that interrupt and it is pending, it should immediately assert the external interrupt to the core. It seems you could achieve masking by using the priorities. If the priority is below the threshold, it it masked (but still enabled), if the priority is above the threshold, it is unmasked. However, I am not sure what the PLIC spec intends to say about what happens when changing the priority for a pending interrupt. I would like to see a clar statement that If the priority is change to a value euals or belopw below the threshold, this also deassert the external interrupt (and claiming will no longer happen) . Vice versa, if the priority of a pending interrupt is changed to a value above the threshold, will this immediately assert the external interrupt and one of the the next claim request may yield.
@axel-h I agree that there is something not clearly defined in the PLIC spec. The PLIC spec here is copied from the one published in RISC-V Privileged Spec v1.9 (Removed from v1.11). We need a PLIC spec for the RVM-CSI platform defined in RISC-V platform spec. We are going to have a public review of PLIC spec soon and please give your comments against the public review email.
I guess that you can implement a "mask-like" behavior with two or more PLIC contexts. In this way, you can use one context for only enabling all the interrupts in your system. This context will never claim/complete an interrupt. Then, the other context(s) can enable/disable dynamically their interrupts and act accordingly. Am I wrong?
