riscv-cheri
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Redundant encodings in RV32
@sorear raised in https://github.com/riscv/riscv-cheri/issues/40 the following:
Under RV32, any capability represented with EF=0 E=0 can also be represented using EF=1 T8=1. Should the redundant case be considered malformed?
I think it's worth having this as its own issue. It should be very simple to check for the redundant cases: since the exponent has now been negated, it just means that the maximum (right) shift is one less, which falls out nicely with the other redundant cases that result from over-shifting the bounds down.
As currently specified, I think the change would look like:
malformedLSB = (E < 0) || (xlen == 32 && E == 0)
(note that this only applies if EF == 0
)
It probably wouldn't be the end of the world to leave it as is, but it could lead to some confusing cases, and it's an RV32-only change.