SYS instructions flushing from ROB do not prevent further retires in same cycle causing program order assertion

[rajatbhatia1]

I have identified a bug in the model where SYS instructions flushing from ROB do not prevent further retires in same cycle causing program order assertion

Here is the test case sys_flush_test.json

Command line: ./olympia --arch ../arches/big_core.yaml ./sys_flush_test.json

Exception while running ex_inst.getProgramID() == expected_program_id_: Unexpected program ID when retiring instruction (suggests wrong program order) expected: 15 received: 11 UID: 235 incr: 1 inst uid:98 RETIRED 0 pid:11 uopid:0 'csrrs 18,0' : in file: '/work/rbhatia2/repos/olympia/github-riscv-software-src-riscv-perf-model/core/ROB.cpp', on line: 153

[rajatbhatia1]

I have the solution for this issue. Please assign to me