riscv-isa-sim
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riscv-software-src
Multiple application on Spike Cores/harts
It is possible to run multicore/mulithart on spike using -p(num) and control the each hart/core by gdb .....
But, Is it possible to run multiple application (executable file) on multiple spike core/harts. If yes, then how .....??
I tried in following ways.....but failed....
spike -l -p2 --rbb-port=9824 -m0x20000000:0x40000 test-64 rot13-64
or
spike -l -p2 --rbb-port=9824 -m0x20000000:0x40000 hartids=0 test-64 hartsids=1 rot13-64
Help please .....
Indeed it is possible. If you look into the repository riscv-tests you will find some baremetal applications that you can adjust to enable multi-core on your software.
If you look into the crt.S file, you will fin the following:
# get core id
csrr a0, mhartid
# for now, assume only 1 core
li a1, 1
1:bgeu a0, a1, 1b
The code is executed semultaneously by all the available cores, each one has an id starting from 0. So all the cores other than the 0 "master" one loop for ever there while the 0 gets to the _init function defined in the syscalls.c file. From there the main function is called and the value returned by it is printed (using the tohost memory via the htif interface).
The very basic app you can do is to let all cores get to the _init then you can affect to each one a function for example.
I hope this helps a little.
Best regards. Noureddine
Just to save others from the trouble of finding the file, crt.S is here: https://github.com/riscv/riscv-tests/blob/master/benchmarks/common/crt.S
The multi-thread vector add seems to be a good starting point, but although the mt- prefix, it actually seems to run only on one core because it links with the crt.S file you're quoting.
So I guess hacking crt.S to actually run _init for all cores would work. If anyone knows a place where one can find ready-to-use example, I'm interested. Otherwise, I guess I'll have to write it ;-).
