riscv-ctg
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riscv-software-src
Add support for the Zfa ISA extension
This patch introduces the RISC-V Zfa extension, which introduces additional floating-point extensions:
- fli (load-immediate) with pre-defined immediates
- fminm/fmaxm (like fmin/fmax but with different NaN behaviour)
- fround/froundmx (round to integer)
- fcvtmod.w.d (Modular Convert-to-Integer)
- fmv* to access high bits of float register bigger than XLEN
- Quiet comparison instructions (fleq/fltq)
Zfa defines its instructions in combination with the following extensions:
- single-precision floating-point (F)
- double-precision floating-point (D)
- quad-precision floating-point (Q)
- half-precision floating-point (Zfh)
Since riscv-ctg does not support the RISC-V quad-precision floating-point ISA extension (Q) as well as the RISC-V half-precision floating-point ISA extension (Zfh), this patch does not include the instructions that depend on these extensions. All other instructions are included in this patch.
The instruction descriptions (simple_cgfs/zfa/*) use different instructions as parameter for the coverpoint generator functions (e.g. fleq.s uses "fle.s") to circumvent documented limitations of these generator functions.
Technically there is no reason to adjust generator.py. All required information could be extracted from instruction descriptions. However, that is not the case, and the file also includes its own hard-coded assumptions, which have to be adjusted as well.
The Zfa specification can be found here: https://github.com/riscv/riscv-isa-manual/blob/master/src/zfa.tex
Updated PR:
- rebased
- updated version to 0.11.1
- updating all version copies
- fcvtmod: Restrict rounding mode to 'rtz'
@cmuellner could you try rebase this PR again, we think the issue https://github.com/riscv-non-isa/riscv-arch-test/issues/331 got fixed already. please use latest riscv-arch-test repo
I've rebased the PR and addressed an issue with the generation of tests for the froundnx instruction.
Updated PR: Added a commit to make the rtz-only restriction more reliable for fcvtmod tests.
Updated riscv_ctg/__init__.py to match the version in CHANGELOG.md (to address the CI error).