riscv-ctg
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Add support for Zdinx extension
#DEVELOPMENT PRs SHOULD BE TO DEV BRANCH ONLY
Description
- Added cover group format for RV32Zdinx instructions.
- Added cover group format for RV64Zdinx instructions.
- Introduced ZDINX flag to aid the compilation of double precision floating ops into integer regs.
- For RV32Zdinx, we use the pair register to accommodate 64 bit value.
Related Issues
NA
Update to/for Ratified/Unratified Extensions or to framework
- Ratified
List Extensions
- Zdinx
Dear @anuani21
The CTG and ISAC Repo had been moved to riscv-arch-test via PR https://github.com/riscv-non-isa/riscv-arch-test/pull/495
If you think this PR is important, and need to me merged on to risc-v CTG or ISAC, please re-submit your PR against riscv-arch-test
This repository shall be archived in about one week time .