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Rust's hardware abstract layer (HAL) for K210 chip, a dual RV64GC SoC with hardware accelerated AI peripherals. Contributions welcomed!

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A lot of important changes have happened to k210-hal since 2019 (the last release) like this: http://github.com/riscv-rust/k210-hal/commit/4b817b75a7296ab221f11b751c6ea20de980132a Any chance of a 0.3.0?

This pr tries to implement the byte send and receive behavior of SPI0. Do not merge. Untested yet.

### Changes Made - Added `DMA` handshake select in `sysctl` - Added `DmacExt` struct for constraining `pac::DMAC` for `Dmac` instance - Ported some `DMAC` driver from C++ library into `Dmac`...

### Changes Made - Implemented a APB1 and APB2 clock controls - Added `APB1` and `APB2` field to `Clocks` struct - Added basic SCCB operation eg. send/receive data - Added...

This pr implement `Timer` trait in `embedded_hal` for each `CHANNEL` in a `TIMER`, which supports a nicer way to create delays.

- revert embedded-hal to 0.2 - add gpiohs(without interrupt support)