riscv-gnu-toolchain
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riscv-mcu
GNU toolchain for RISC-V, including GCC. Tweaked for microcontrollers.
The compiler generates redundant shift operations when loading a volatile int16_t value. This inefficiency persists even under standard optimization levels (-O1, -O2, -Os). ``` #include volatile int16_t x; int get()...
When optimizing volatile memory operations, GCC 13.1 and 14.1 generate redundant instruction sequences instead of optimizing them. Below is my test case: ``` -march=rv64gc -mabi=lp64d -Os #include uint16_t test_rd(uint32_t addr)...
When compiling RISC-V code with the Zbs extension enabled, the toolchain fails with errors related to instruction generation or optimization. This occurs because the 2025.02 Windows toolchain was compiled on...
# How to build **请仔细阅读文档以后，再提问，欢迎指出文档问题** > Source code with git repo info can be downloaded from https://drive.weixin.qq.com/s?k=ABcAKgdSAFcJ0kx0kt > [!NOTE] > 1. We **dont provide any support for build toolchain**, since...
