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Published 20 hours ago • verified publisher icon risclite
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This ARMv4-compatible CPU core is written in synthesiable verilog.It could launch uCLinux and Linux in MODELSIM. It has high Dhrystone benchmark value: 1.2 DMIPS/MHz. It could be utilized in your FPG...

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about timer interrupt in uclinux simulation

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hi,When I simulating uclinux in my processor model,I noticed the code at the end of the tb.v file.It appears to be simulating the timer TC1 interrupt to calculate Bogomips.But these...

mmw43 avatar mmw43

uClinux.bin

2 comment

hello,do you have uClinux.bin or .elf file？Because now I need to use this compiled binary file .thanks a lot.

mmw43 avatar mmw43

Thumb support?

This project is probably the best A**v4 core on github. Thanks for your work! Is there any work that have been done to add v4 thumb instruction support? That would...

nand2mario avatar nand2mario

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verified publisher icon risclite

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This ARMv4-compatible CPU core is written in synthesiable verilog.It could launch uCLinux and Linux in MODELSIM. It has high Dhrystone benchmark value: 1.2 DMIPS/MHz. It could be utilized in your FPG...

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