rherveille

Please try the latest dev branch

Not yet. The CPU subsystem uses the RoaLogic JTAG TAP and adv_dbg_system. Together with the associated OpenOCD port. OpenOCD + GDB is supported.

We haven’t tried running Linux yet. But other OS-es run on the CPU, or better derivates of the CPU. If you’re interested we’re happy to assist you in investigating Linux...

FreeRTOS is fully running on the dev branch of the CPU uCLinux (no MMU yet) is planned for this year.

The code has been compiled using the Intel, Xilinx, and Lattice design flows. We run simulations with the Aldec and Mentor tools. Unfortunately I do not have access to the...

That fix mixes ANSI-style and old-style (K&R) parameter declarations. That causes problems in other tools.

Design Compiler should treat an ‘X’ as don’t care. Resetting to ‘x’ would mean no reset. Resetting to 0 is fine. Out of curiosity, what did DC generate? Did you...

Fixed differently

Honestly I don’t know if this was tried with Design Compiler. Can you point me to the error? This might be a case of just asking the question differently (i.e....