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Published 20 hours ago • verified publisher icon renesas

Consecutive volatile float access instructions may be out of order when using Arm Compiler 6.22

Open renesas-austin-hansen opened this issue 4 months ago • 1 comments

Issue

The FSP development team has identified an issue with Arm Compiler 6.22 where in some cases the load and store instructions for consecutive volatile float accesses may be placed out-of-order. Arm has been notified and a fix is tentatively scheduled for the AC 6.23 release. In FSP code, this issue only affects the IIRFA driver and only when Polling Mode is set to Disabled.

Workaround

  • When using IIRFA with Arm Compiler 6.22 set Polling Mode to Enabled.
  • Inspect any non-FSP code carefully after compilation to ensure volatile float access order is as expected.

renesas-austin-hansen avatar Oct 25 '24 19:10 renesas-austin-hansen