Painting comments

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                                            Painting

FV on the Current Design

I will try to add some cmodel/golden and formals to your design.

Learning NVDLA SDP HW code

sdp有点难的，我也没太看懂。谢谢资料。

Learning NVDLA SDP HW code

”在模块的开头，有一条注释，模块应该是生成的，目前还没找到生成文件和说明文档。 Generated by ::pipe -m -bc -os cacc_pd (cacc_vld, cacc_rdy)

Learning NVDLA CMAC HW Code

欢迎讨论。

Learning NVDLA CMAC HW Code

https://github.com/redpanda3/soDLA-ipynb/blob/master/CMAC.ipynb 这是我的对它的重构。即使用chisel做了最大程度地代码压缩，也是需要一些时间才能读懂的。

Learning NVDLA CACC HW Code

快做呀，老哥。

[Feature] MLX backend

> For reference I implemented this model in MLX. You can try it here: https://github.com/awni/mlx-examples/tree/open_sora/open_sora. > > * On an M2 Ultra it can take anywhere from a minute to...

Any result compared to the real t5?

Hi, Matt. The trial is occasional. One in Genus+asap7, and another in Synopsys+t7. So I have this question. How are the accuracy and completeness of this pdk now?

Any result compared to the real t5?

The result is just about area by synthesis happened long ago. I will use t**7_baseat_svtt_0p75 and compare again, with both asap7 6 and asap7 7.5 track, test it again. Do...

Any result compared to the real t5?

And is it possible to synthesis using genus or dc in asap5? I would have a comparison between a5 and t5.