build troubles
Hello Diez! Do you have any makefile for build your scetch?
I try build this, but my experiment failed:
[uart_dpi]$ verilator -sv --cc --trace uart_dpi.v --exe uart_dpi.cpp
%Error: uart_dpi.v:571: syntax error, unexpected |=, expecting '=' or <=
%Error: Exiting due to 1 warning(s)
%Error: Command Failed verilator_bin -sv --cc --trace uart_dpi.v --exe uart_dpi.cpp
best regards Doka
Von: iDoka [email protected] An: rdiez/uart_dpi [email protected] Gesendet: 8:42 Donnerstag, 27.März 2014 Betreff: [uart_dpi] build troubles (#1)
Hello Diez! Do you have any makefile for build your scetch? I try build this, but my experiment failed: [uart_dpi]$ verilator -sv --cc --trace uart_dpi.v --exe uart_dpi.cpp %Error: uart_dpi.v:571: syntax error, unexpected |=, expecting '=' or <= %Error: Exiting due to 1 warning(s) %Error: Command Failed verilator_bin -sv --cc --trace uart_dpi.v --exe uart_dpi.cpp
I must admit, I haven't used that file for a while. The following file in the orbuild repository could serve as an example:
Scripts/Projects/OpenRISC/Tools/SimulatorBuildScripts/BuildSim-OR10-Verilator.sh
Best regards, rdiez
Ok. I copy BuildSim-OR10-Verilator.sh to uart_dpi project folder I run it:
[uart_dpi]$ ./BuildSim-OR10-Verilator.sh
Error in script "./BuildSim-OR10-Verilator.sh": Invalid number of command-line arguments, see the source code for details.
I looked at the script file, and it contains a many lot of dependencies, as opposed to the typical one-line verilator-examples, e.g.
source "$ORBUILD_SANDBOX/Scripts/ShellModules/StandardShellHeader.sh"
source "$ORBUILD_SANDBOX/Scripts/ShellModules/MakeJVal.sh"
...
get_make_j_val MAKE_J_VAL
CMD="make -f \"V$TOP_LEVEL_MODULE.mk\" -j \"$MAKE_J_VAL\""
I would like to work with a current uart-example, unattached to infrastructure of OR10.
If possible, could you describe a short list of actions required to independently simulation uart-example?
[...] I looked at the script file, and it contains a many lot of dependencies, [...]
I mentioned that script just as an example to get inspiration from. I don't think I ever wrote a stand-alone UART test bench. I'm sorry that I haven't got the time at the moment to provide further support for that Verilog module.
Regards, rdiez