Can the phase of the PIO clock of the RP2040 be adjusted?

[a0k1i2n3g]

Can the PIO of the RP2040 set a fixed additional phase offset for the clock of each state machine? In this way, multiple PIOs can be used to sample the same GPIO to achieve the so - called oversampling. With this, the RP2040 can replace many CPLDs used for sampling, and the data processing is done through C - language programs. Just thinking about it gets me excited!