Does the PLL "tip" in the datasheet really warrant an assertion failure in pll_init

[d-c-d]

Does this assert in pll_init (pll.c line 34) warrant an assertion failure?

    // post_div1 should be >= post_div2
    // from appnote page 11
    // postdiv1 is designed to operate with a higher input frequency
    // than postdiv2
    assert(post_div2 <= post_div1);

I was unable to find the referenced appnote page 11 and all that is mentioned in the datasheet was this tip. A preference does not imply an assertion failure in my opionion.

TIP When two different values are required for POSTDIV1 and POSTDIV2, it’s preferable to assign the higher value to POSTDIV1, for lower power consumption.