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raspberrypi
See: https://github.com/rhulme/picoROM_pio/issues/2#issuecomment-962603752 I measure 11 cycles in a PIO state machine that has just auto-pushed an address to its RX FIFO and is stalled waiting for a byte to be...
I ran the hello_multicore example with ``` pico_enable_stdio_usb(hello_multicore 1) pico_enable_stdio_uart(hello_multicore 0) ``` in the _CmakeLists.txt_. But it did not present me with the expected _/dev/ttyACM0_. Also, it didn't mention anything...
From the RP2040 Datasheet `ef82dc8-clean`, it is not immediately clear how to avoid race conditions in USB double buffering mode when updating the buffer control "register". Currently, it seems that...
The PIO comments in [`i2c.pio`](https://github.com/raspberrypi/pico-examples/blob/master/pio/i2c/i2c.pio#L28-L29) state that: ``` ; The TX FIFO should be accessed with halfword writes, to ensure ; the data is immediately available in the OSR. ```...
The register doc tables for `DMA:INTS0` and `DMA:INTS1` say: > Channel interrupts can be cleared by writing a bit mask here. This is a wee bit vague, since it doesn't...
I think the documentation could use some extra information about the need for memory barriers: so far as I can see, there's currently neither explanatory material in the SDK, nor...
In raspberry-pi-pico-c-sdk doc, Section 3.2.2 Pg 37 on. The Times specified in the code and on page 37, are T1=2, T2=5, T3=3 however the timing diagrams further down Fig 4...
The effect of atomic register access as defined in RP2040 datasheet, Sect. 2.1.2 seems unclear to me when applied onto some specific registers. Example 1: Atomic XOR on write (e.g....
I tried to follow the instructions to use VS Code for the `test` project as described in chapter 8. I found that the command-line instructions seemed to work right, which...
The I2C hardware used in the RP2040 does not provide for zero-length writes. Such writes are often used for device probing on an I2C bus. A read works for some...