pico-feedback
pico-feedback copied to clipboard
Rp2350 - IRQ latency is affected by XIP cache misses
Hello,
it would be good to see in doc (would have been good not facing with it on testpad) that the interrupt latency is heavily affected by the XIP cache misses. I mean instead of 12 cycle the ~300 cycles are a bit dreadful.
The reason is written here I believe: https://forums.raspberrypi.com/viewtopic.php?p=2036379#p2036379
It also would be good to have in doc that what happens if an un-XIP-cached flash code is interrupted with an ISR located in RAM, on the same core (would it still stall the ISR startup?).
If it is documented in RP2350 the datasheet, then my bad. (Could you please give me a reference to that part of the specs?)