Inaccurate documentation of AIRCR:STSRESETREQ (RP2040 datasheet)

[arg08]

The description of AIRCR in section 2.4.8 of the datasheet says:

SYSRESETREQ Writing 1 to this bit causes the SYSRESETREQ signal to
the outer system to be asserted to request a reset. The
intention is to force a large system reset of all major
components except for debug. The C_HALT bit in the
DHCSR is cleared as a result of the system reset
requested. The debugger does not lose contact with the
device.

which leads the reader to expect that the whole system can be reset by SYSRESETREQ (as happens on other CortexM0 devices).

However, on RP2040 it doesn't. The true behaviour is correctly documented in 2.4.2.9, but the text in 2.4.8 apparently hasn't been updated to match.

Suggest replacing the sentence "The intention is to force a large system reset of all major components except for debug" by something like "On RP2040, this resets only the core on which SYSRESETREQ is asserted, and not the wider system."

[aallan]

@nathan-contino Check with the ASIC team and fix up or close appropriately.