[RFC] 50Mhz logic analyzer

[perexg]

I implemented 50Mhz 16-bit logic analyzer (grabber) on top of the picoprobe to have all-in-one debugging pico board (programmer / debugger, TTL UART, logic grabber for the problem analysis). I expect that this PR will not be merged (but perhaps, you will like it).

Add the logic analyzer implementation based on the SUMP protocol

Supported features:

- up to 16 probes (gpio 6-21 by default)
- 200kB RAM for samples
- RLE encoding
- test mode (external pattern)
  * probe 0 and 1 - 10Mhz PWM
  * probe 1 and 2 - 1Mhz PWM
  * probe 3 and 4 - 1kHz PWM
  * probe 8 and 9 - 1kHz PWM (swapped levels)
- test pin (gpio 22) - 5Mhz 50%/50% PWM for probe tests (activated only when sampling)

Limits:

- 50Mhz sampling rate when compiled with the TURBO_200MHZ define (otherwise 31.25Mhz)
- basic triggers are implemented (functional up to 10Mhz - TODO: PIO support)

This protocol is supported in sigrok as openbench-logic-sniffer:

  pulseview --driver=ols:conn=/dev/ttyACM1

  sigrok-cli --driver=ols:conn=/dev/ttyACM1 --config samplerate=50Mhz \
             --config pattern=External --samples 256 --channels 0-1

Misc:

- picoprobe reset pin is on gpio 28 (instead 6) now

Link: https://www.sump.org/projects/analyzer/protocol Link: https://github.com/sigrokproject/libsigrok/tree/master/src/hardware/openbench-logic-sniffer

[ejona86]

@perexg, cdc_sump.h is missing. Most of it seems straight-forward to create, but there are a defines that are less obvious.

[perexg]

@ejona86 : I added the missing file now. Thank you for your note.

[thezim]

I think this would be a great addition. I recently picked a Cypress CY7C68013-56PVC base logic analyzer and it just cant keep up at 24 Mhz. Getting 50Mhz along with a pico probe would be a big plus.

I don't know much about logic analyzers but is it possible to reduce the number of channels and increase the sample rate here?

[DatanoiseTV]

I think this is great. Would love to see one extra UART with RTS/DTR signals. I'm working on a board with a RP2040 and ESP32 in my spare time and it would be great to add in a RP2040-Picoprobe as Sump-Compatible logic analyzer and as USB-UART for programming the ESP32 firmware.

Perhaps the I/O could be set remotely and logic analyzer pins could be changed on the fly?

[P33M]

Thank you for your efforts, but this is out-of-scope for Picoprobe. The intent is to provide a standard SWD interface and UART, which are the two most commonly-used interactive and non-interactive debug aids. Complex probing and monitoring methods are both specific to the user's needs and hard to describe generically, so we won't be doing that.