quilc
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quil-lang
The optimizing Quil compiler.
The following code snippet generates a compilation error on `quilc` 1.25.0 and 1.25.1 (as pulled from DockerHub) and `pyquil` 3.0.0: ``` from pyquil import get_qc, Program from pyquil.gates import H,...
I don't suggest we use SK as a part of the normal compilation pipeline, but it would be nice if there was a supported implementation of it.
Target gate sets are computed by looking at calls to INST. If the INST's are buried away, they won't get recognized. Two options: * revert the dynamic INST * allow...
From Discord: > 09/16/2021 Hey folks, a question from a quilc user - what is port 6000 used for/why is it exposed? It's referenced in the Readme but nowhere else...
The [paper](https://arxiv.org/pdf/1909.05270.pdf) by Iten et al. proposes an approach for doing quantum circuit rewriting. Implement their approach and compare to ours.
Creating a minimal example of a program using `PRAGMA PRESERVE_BLOCK` and attempting to see the Native Quil that was generated when targeting the Aspen-9 lattice will generate a timeout in...
# Quilc fails to compile in a Ubuntu17.04 OS ## Testcase ``` OPENQASM 2.0; include "qelib1.inc"; qreg q[2]; gate cu1fixed (a) c,t { } gate cu c,t{ cu1fixed (pi/2) c,t;...
Consider the following program ``` CNOT 0 1 X 1 CNOT 1 2 ``` Naively, one would expect that the dependency graph of these instructions looks like this: ``` CNOT...
There seems to be confusion between 'schedule' and 'scheduler' throughout sources and doc. They seem to be used interchangeably, which seems confusing. Is a "schedule" the same as a "scheduleR"?...
During routine testing of cl-quil, e.g., via `(asdf:test-system :cl-quil)`, you get about 36 warnings like so: ``` Chip specification contained fidelity 1.00148826469601d0 > 1.0:*. Truncating to 0.9999999999999999d0. ``` I think...