quilc
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quil-lang
The optimizing Quil compiler.
would be good to do a regular checkup on the style-warnings and fix them as needed
It is known that quilc hasn't been particularly optimized for performance. @notmgsk did some significant algorithmic work to improve things, and others have done things here and there. However, the...
In PR #802 we recognized that `RZ` is such a small number that in larger calculations of gate sequence fidelities, it gets completely lost, leading to imprecise compilation. In that...
https://github.com/quil-lang/quilc/pull/785 adds the defgate as sequence feature to the quil language. One drawback of the existing implementation is that quilc is constricted in how it utilizes sequence gate definitions. There...
https://github.com/quil-lang/quilc/pull/785 adds the defgate as sequence feature to the quil language. One issue is that in it's current state, there are little to no optimizations. This means that any quil...
The rewiring metadata returned by the compiler appears to be incorrect in some cases. The metadata are stored in the `metadata.final_rewiring` field of the response from the gRPC call: `response...
* Add enough support to make building an order 2 object with a native CCNOT gate work. * Plumb enough internals to get trivial compilation working. Compression does not work...
The random unitary chosen in `warm-up-addresser-state` is mismatched with the stated goal of the slot it populates. Namely, it claims to calculate a 'worst case' cost for any unitary operation...
When running quilc with a chip-spec file with a one-directional 2q gate, quilc infinite loops on warming addresser cache. This is caused by `expand-instruction-to-native-instructions` recursing forever, eventually crashing sbcl. From...
