Improved fpu_fxsave/fpu_fxrstor patch makes vanilla WoW look weird
I did a bisect and found this patch with commit bcb19db at fault.
Patch : https://github.com/ptitSeb/box86/commit/bcb19dbe5dad09f2e4c969794bcb08f3f78929e7
All textures are skewed, and no text is rendered.
Ah. But this commit actualy fix fxsave/fxrstor, becasue mxcsr was badly saved. I need to study again those opcode. Also, I don't have WoW so I cannot test to see if it's fixed.
FYI I'm running on a Pinebook Pro in 64bit debian, using a 32bit chroot. I tried clearing the mask in fpu_fxsave by readding: p->MxCsr_Mask = 0; Simply to try it out without knowing what I am doing, to little effect.
Maybe I can poke around with some trial and error stuff if you have some pointers.
I think I need to take MxCsr_Mask into account in fxrstor, but I need to check in intel doc what are the default value and al. for this field.
I'm terribly sorry - did some retesting - and when reverting to the patch before this it works - manually moving to this patch it still works. So the bisect failed - not sure what I did wrong. I'm redoing it now, more info to come.
make sure you run wineserver -k between runs, to have all wine process killed
I simply didn't do the last step - not used to bisecting - I thought "0 steps" meant it was done. So this patch is the last patch that works. The broken patch is the next: 053a75f It's a rather large patch: https://github.com/ptitSeb/box86/commit/053a75f5d562396f11609d7bb335a07800d4335e Should I resubmit a new issue?
No that's fine, it's still the same issue (ah, I remember being fooled by that "0 steps" left message before too) The commit is bigger yes, and changed a lot of things.
Can you try to run with some flags like BOX86_DYNAREC_SAFEFLAGS=2 or BOX86_DYNAREC_BIGBLOCK=0 and see if it changes something?
I have reverted to head of master again. BOX86_DYNAREC_BIGBLOCK=0 fixes the issue actually, the other does not.
you can submit a PR with a box86.box86rc entry for the WOW process name if you want as a workaround