UART echo's back half the input

[eliquinox]

I have set up the UART example with Arty A7 100 board and I observe the following:

When I send data to the USB descriptior as:

echo "AAAA" > /dev/ttyUSB3

In the minicom I can see

AA

being output.

Is that expected? Shouldn't all the input be echo'd back or am I missing something?

[eliquinox]

Hi @WillGreen any ideas about this?

[WillGreen]

Thanks for your issue report. Can you tell me what serial settings you’re using?

NB. I’m away until next week. I’ll look into your issue when I return.

[eliquinox]

Here are my minicom settings: Let me know if you need other info.

[WillGreen]

I do most of my Xilinx FPGA dev on Windows. I've used PuTTY for serial testing, which doesn't have this issue.

However, I've managed to reproduce your issue in Windows under WSL running Debian 11.

I configured the serial port (COM4): stty -F /dev/ttyS4 9600 cs8 -cstopb -parenb

Then used cat and echo on the serial port and only saw every other character.

I don't yet know why this is happening I'm afraid. But will continue to investigate.

[eliquinox]

@WillGreen thanks for the follow up. FYI I have gotten a working solution which you can find here: https://forum.digilent.com/topic/24424-arty-a7-100-uart-echo-example-repost/#comment-72260

I don't happen to have a Windows machine handy, so perhaps you can try it out and see if the design generalises to both. At the moment I don't require any further assistance, so feel free to close the issue.

[WillGreen]

Thanks for your reply. I'll leave the issue open until I get a chance to test this. I can also try it on Linux with iCEBreaker board.

[wil-low]

I've spend several hours to find reliable UART RX and TX implementation. The one that I use now is from Alinx AX301 demo board. I've added into my fork of your excellent repo: https://github.com/wil-low/projf-explore/tree/main/lib/uart-2

[WillGreen]

I've spend several hours to find reliable UART RX and TX implementation. The one that I use now is from Alinx AX301 demo board. I've added into my fork of your excellent repo: https://github.com/wil-low/projf-explore/tree/main/lib/uart-2

Cool. I’ve not looked at the UART in a while, but I plan to come back to it later this year as part of an FPGA design I’m working on.