projf-explore
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Preliminary support for the ULX3S.
This adds support for the
- graphics/framebuffers
- graphics/pong
examples for the ULX3S board.
Has been tested on my board.
Thank you for your PR. I am currently on leave and will review your request in October.
Thank you for your patience. 🙏 I have merged my outstanding branches, so your PR is the next thing I'll work on.
Hi there, no problem, since I'm usually very busy anyway.
May I elaborate a little on my changes:
- The main constraints file for the ULX3S was taken from: https://github.com/emard/ulx3s/blob/master/doc/constraints/ulx3s_v20.lpf It is the same for every project. It might be a good idea, to make it global.
- The ULX3S' main chip, the ECP5, does not support SERDES. HDMI is implemented using a "hack" using the ECP5 ODDRX1F primitive, which allows for doubling the data rate and thus makes 720p@60Hz and 1080p@30Hz possible. Still the naming is somewhat awkward as I used CVR-RBv2. My feeling is to make these settings available as generics and thus reduce code deduplication.
- Most of the code is Verilog and not System Verilog. You will probably like this to be adapted.
- There are still some examples missing, I'll wait for your feedback first.
- I have tried to get the animated-shapes examples running, but so far in vain. I suspect missing attributes on cdc paths / timing failure to be the problem.
I've dusted off my ULX3S board and have successfully built the first few of your versions.
I think the best way to handle this is to take each FPGA Graphics part, work together on the ULX3S version, and then merge it to main.
I've created a branch called fpga-graphics-ulx3s. If you could checkout this branch, add your designs for projf-explore/graphics/fpga-graphics
, and then create a fresh PR against this branch, we can work on that first.
Once we're happy with fpga-graphics, we can merge it to main, then create a fresh branch for fpga-pong etc.
I hope this sounds good to you, but do let me know if you have any concerns.
Agreed with @tristanitschner to close this PR. There is a new PR #128 covering FPGA Graphics.