premake-core
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premake
RISC-V Support
What does this PR do?
Enables RISC-V support.
How does this PR change Premake's behavior?
No breaking changes, enables an additional build target.
Anything else we should know?
This has only been tested successfully within the scope of getting https://github.com/GTAmodding/re3 to build.
Did you check all the boxes?
- [✔] Focus on a single fix or feature; remove any unrelated formatting or code changes
- [❌] Add unit tests showing fix or feature works; all tests pass
- [N/A] Mention any related issues (put
closes #XXXXin comment to auto-close issue when PR is merged) - [✔] Follow our coding conventions
- [✔] Minimize the number of commits
- [✔] Align documentation to your changes
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The following files may need updating but I'm not sure how to proceed with confidently making the required changes here.
- /contrib/curl/include/curl/curlbuild.h
- This looks like it should be accepting its changes from upstream, rather than be made locally. Should this not be a gitmodule?
@archanox Just to confirm, you're only adding RISC-V support for D projects specifically using LDC?
Can we get a unit test added in here?
Can I get some guidance on how to go about this? What, where, how…?
@archanox Just to confirm, you're only adding RISC-V support for D projects specifically using LDC?
It shouldn’t be “only”. If you’d prefer I can create an issue outlining what was the problem I intended to solve, showing what wasn’t working. In a nutshell GTAmodding/re3 was unable to be provided the RISC-V target.
Can we get a unit test added in here?
Can I get some guidance on how to go about this? What, where, how…?
@archanox Just to confirm, you're only adding RISC-V support for D projects specifically using LDC?
It shouldn’t be “only”. If you’d prefer I can create an issue outlining what was the problem I intended to solve, showing what wasn’t working. In a nutshell GTAmodding/re3 was unable to be provided the RISC-V target.
For the unit tests, please add to the test_ldc.lua file. There are some tests there for the LDC toolchain. If you have a more specific question, let me know and I'll answer regarding the unit tests.
@archanox Right, I see, you don't want to specify RISC-V specifically, you just want a platform that doesn't specify architecture. I was expecting some of these to be modified if you were wanting RISC-V specifically, similar to how you modified LDC. GCC: https://github.com/premake/premake-core/blob/bfafd86a14447d5d15dab6d69be3ff7569fe71aa/src/tools/gcc.lua#L50-L53 https://github.com/premake/premake-core/blob/bfafd86a14447d5d15dab6d69be3ff7569fe71aa/src/tools/gcc.lua#L409-L412 https://github.com/premake/premake-core/blob/bfafd86a14447d5d15dab6d69be3ff7569fe71aa/src/tools/gcc.lua#L453-L468
Clang: https://github.com/premake/premake-core/blob/bfafd86a14447d5d15dab6d69be3ff7569fe71aa/src/tools/clang.lua#L217-L220
DMD: https://github.com/premake/premake-core/blob/bfafd86a14447d5d15dab6d69be3ff7569fe71aa/modules/d/tools/dmd.lua#L33-L36 https://github.com/premake/premake-core/blob/bfafd86a14447d5d15dab6d69be3ff7569fe71aa/modules/d/tools/dmd.lua#L54-L57 https://github.com/premake/premake-core/blob/bfafd86a14447d5d15dab6d69be3ff7569fe71aa/modules/d/tools/dmd.lua#L124-L127 https://github.com/premake/premake-core/blob/bfafd86a14447d5d15dab6d69be3ff7569fe71aa/modules/d/tools/dmd.lua#L214-L217
GDC: https://github.com/premake/premake-core/blob/bfafd86a14447d5d15dab6d69be3ff7569fe71aa/modules/d/tools/gdc.lua#L27-L30 https://github.com/premake/premake-core/blob/bfafd86a14447d5d15dab6d69be3ff7569fe71aa/modules/d/tools/gdc.lua#L201-L204 https://github.com/premake/premake-core/blob/bfafd86a14447d5d15dab6d69be3ff7569fe71aa/modules/d/tools/gdc.lua#L230-L233
LDC: https://github.com/premake/premake-core/blob/bfafd86a14447d5d15dab6d69be3ff7569fe71aa/modules/d/tools/ldc.lua#L303-L306 https://github.com/premake/premake-core/blob/bfafd86a14447d5d15dab6d69be3ff7569fe71aa/modules/d/tools/ldc.lua#L324-L327
@samsinsane ashamedly all I did was do a quick search for ARM64 and slipped in RISCV64 next to it. I then proceeded to build my fork https://github.com/archanox/re3 using the binary built from this premake fork, and there were no apparent issues. I will still look at plumbing through the rest of the changes as there are tuneables for rv64. https://gcc.gnu.org/onlinedocs/gcc/RISC-V-Options.html
A consideration I had not made is that someone may use this tool for RISC-V 32bit platforms outside of Linux (embedded etc).