sunflower-embedded-system-emulator

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**Describe the bug** In machine-hitachi-sh.c:751 memset(S->superH->B, 0, sizeof(SuperHBuses)) produces a segmentation fault because S->superH->B is NULL.

btsouts

rv32d_fclass_d and rv32d_fclass_s contain non-portable code and might misbehave in default case of switch(class)

2

`rv32d_fclass_d()` and `rv32d_fclass_s()` contain non-portable code and might misbehave in default case of `switch(class)`. @harrysarson, @rjlv2, or @SamuelmsWong, are you interested in looking at this after #132 has merged?

phillipstanleymarbell

More embedded target changes

phillipstanleymarbell

Magic numbers in `taint.c/taintprop()`

2

Magic numbers in `taint.c/taintprop()` magic numbers (unnamed constants) should be replaced with the named constants in `decode-riscv.h`. @HAM41 or @SamuelmsWong, interested in looking at this?

phillipstanleymarbell

.gitmodules points to old repository for sunflower-toolchain

1

**Describe the bug** A stale reference in .gitmodules On a fresh repo: ``` git clone --recursive https://github.com/physical-computation/sunflower-simulator.git ``` the remotes differ: ``` ~/git/sunflower-simulator git remote -v origin https://github.com/physical-computation/sunflower-simulator.git (fetch) origin...

jan-heck

New defaults for various compile-time configurations

1

New defaults for various compile-time configurations to ease porting to a certain new host platform.

phillipstanleymarbell

Recent incoming contributed RISC-V-related code did not follow coding conventions in various places, breaking homogeneity. Related to #29.

phillipstanleymarbell

phillipstanleymarbell

phillipstanleymarbell

In `reg_read_riscv()`, `data` may be uninitialized if `n > RISCV_GPR`

2

In `reg_read_riscv()`, `data` may be uninitialized if `n > RISCV_GPR`. (cc: @Z-Gu)

phillipstanleymarbell