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Published 20 hours ago • verified publisher icon pheaver

Add Case Expression

Open garrinkimmell opened this issue 14 years ago • 2 comments

Something like:

ExprCase Expr [(Expr,Expr)](Maybe Expr)

garrinkimmell avatar Mar 02 '10 23:03 garrinkimmell

Added ExprCase in b99e4b7ee8e313fcbd8be428d1379a1f4211c9ff.

Still need to add support in GenVerilog and GenVHDL.

pheaver avatar Mar 24 '10 05:03 pheaver

Andy added support in GenVHDL in be14588fff8ac5fafc71821489b4e5408cef1988

pheaver avatar Mar 24 '10 18:03 pheaver