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qca_dram cas latency

Open j-d-r opened this issue 7 years ago • 8 comments

Hi @pepe2k,

There might be a problem with dram cas, are you sure of your formula ?

2 * mem_cas and high bit in position 31 in function qca_dram_set_ddr_cfg().

If I extract values from QCA u-boot in init953x, init955x and init956x, in CFG_DDR2_CONFIG_VAL the values are:

CAS MSB 3LSB
3 0 7
4 1 1
5 1 4
6 1 6

Regards, Julien

j-d-r avatar Apr 08 '18 22:04 j-d-r

Hi @j-d-r,

With QCA you just can't be sure... Have a look at https://github.com/pepe2k/u-boot_mod/pull/120. So far, I wasn't able to reproduce issue mentioned there and never had any issues with other boards.

Regards, Piotr

pepe2k avatar Apr 08 '18 22:04 pepe2k

Ok, thank you. That's a mess, and without clear documentation...

I've done it with an #ifdef and comparisons. (https://github.com/j-d-r/u-boot-QCA956x/commit/b7b21f5052aa2fda256384fe36ea4d9be43117bb#diff-a22fd116cd714c4202b4591f9645e2deR557)

j-d-r avatar Apr 08 '18 23:04 j-d-r

Ok, thank you. That's a mess, and without clear documentation... /* 2 * MEM_CAS is not working on QCA956x */

Does your board hang or doesn't boot at all with default value (2 * MEM_CAS)?

pepe2k avatar Apr 09 '18 05:04 pepe2k

It does not boot at all. Nothing on UART.

CAS should be 5, but if i set CONFIG_BOARD_DRAM_CAS_LATENCY to 6 (same value in QCA_DDR_CFG_REG than QCA u-boot with 5) it also doesn't boot, maybe because it doesn't match QCA_DDR_CFG2_REG.

But it does not hang completely, I can still set QCA_DDR_CFG_REG to a good value just after calling qdca_dram_init()

j-d-r avatar Apr 09 '18 06:04 j-d-r

Hi, I had problems too. My cpu qca 9533 650 Mhz, tp link tl-wr841hpv3.2, After installing your pepe2k uboot my cpu was running at 400 Mhz, I think it's something to do with Memory cas timing. I needed your version of u boot to restore my art partition as it needed to be reinstalled after upgrade to 16 Mb flash from 8 Mb. This router got 64 Mb DDR2 ram. But I got back to Original/Factory u-boot and my cpu now running at 650 Mhz. My router Hardware details, GD 25Q64CSIG, 64MBit SPI Flash, 8Mb, SOIC-8 Changed to , GD 25Q128CSIG, 128MBit SPI Flash, 16Mb, SOIC-8 Memory: DDR2 SDRAM 800 Mhz : Zentel 512Mb A3R12E40DBF 32M x 16 1.8V DDR2-800/1066 FBGA-84 MP https://imgur.com/a/mHNklm6 SOC : Qualcomm Atheros QCA9533-BL3A 650 Mhz CPU https://imgur.com/a/6t4ly4e

I'm using openwrt_tl-841n-v10, and it got ddr ram not ddr2. Logs Factory u-boot, "Mon Sep 17 12:04:48 2018 kern.info kernel: [ 0.000000] Memory: 60412K/65536K available (3105K kernel code, 154K rwdata, 400K rodata, 236K init, 208K bss, 5124K reserved, 0K cma-reserved) Mon Sep 17 12:04:48 2018 kern.info kernel: [ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 Mon Sep 17 12:04:48 2018 kern.info kernel: [ 0.000000] NR_IRQS:51 Mon Sep 17 12:04:48 2018 kern.info kernel: [ 0.000000] Clocks: CPU:650.000MHz, DDR:392.187MHz, AHB:216.666MHz, Ref:25.000MHz Mon Sep 17 12:04:48 2018 kern.info kernel: [ 0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 5880801374 ns Mon Sep 17 12:04:48 2018 kern.info kernel: [ 0.000010] sched_clock: 32 bits at 325MHz, resolution 3ns, wraps every 6607641598ns Mon Sep 17 12:04:48 2018 kern.info kernel: [ 0.008268] Calibrating delay loop... 432.53 BogoMIPS (lpj=2162688)"

gfx18 avatar Sep 17 '18 06:09 gfx18

Hi @gfx18,

After installing your pepe2k uboot my cpu was running at 400 Mhz, I think it's something to do with Memory cas timing.

This has nothing to do with CAS settings. You should check your reset button definition - GPIO number and polarization. My modification has a recovery mode in case of wrong clock/PLL configuration - if you press reset button on power up, safe clocks (400/400/200) will be applied.

I'm using openwrt_tl-841n-v10, and it got ddr ram not ddr2.

Your device is different, you shouldn't use U-Boot dedicated for a different model.

Cheers, Piotr

pepe2k avatar Sep 17 '18 07:09 pepe2k

OK, thanks for the info. But I did install your version of uboot to several others i.e. tl840, tl802 etc. running successfully. They got same SOC!! I did not have to recover anything, it always booted successfully, may be I'm lucky!! Thanks anyway, without it I would not be able to update the flash chip. so Thank you for your version of u-boot!!

gfx18 avatar Sep 17 '18 12:09 gfx18

OK, thanks for the info. But I did install your version of uboot to several others i.e. tl840, tl802 etc. running successfully. They got same SOC!!

But they may differ in GPIO (and/or other) configuration.

I did not have to recover anything, it always booted successfully, may be I'm lucky!!

Or your device has a similar "issue" as some of the YunCore stuff, have a look: https://github.com/pepe2k/u-boot_mod/blob/master/u-boot/cpu/mips/ar7240/qca_gpio_init.S#L807

Eventually, it just ignored pressed button and booted the system... just 10s later: https://github.com/pepe2k/u-boot_mod/blob/master/u-boot/include/env_scripts.h#L166

Thanks anyway, without it I would not be able to update the flash chip. so Thank you for your version of u-boot!!

Welcome!

Cheers, Piotr

pepe2k avatar Sep 17 '18 12:09 pepe2k

Sorry but this project is no longer maintained.

pepe2k avatar Oct 13 '22 10:10 pepe2k