pepe2k
Set CAS_LATENCY/GATE_OPEN_LATENCY to (2*CL)+1 for AR933x running DDR2
Documented in https://github.com/pepe2k/u-boot_mod/commit/3527b8cc2a989e51197831eab1f941429f8ffeea
Unstable behaviour in openwrt/lede found with use of SKW72 (Skylabs) OEM AP121 reference board: -
AR9331-AL3A, Flash = Winbond (25Q128FVSG) Ram = Zentel DDR2 (A3R12E40CBF).
Prior to clean up in 3527b8cc2a, CAS_LATENCY and GATE_OPEN_LATENCY were set to (CL*2)+1. This commit reverts to the previous calculation by adding the extra DDR clock cycle.
This stabilised 3 out of 10 preproduction devices which exhibited critical stability issues.
Just an update on my part, we ran a set of tests across 5 devices over the weekend and they're all running fine. I ran a iPerf test as above on one of the known problematic devices and it survived 15K iterations and didn't miss a beat. :)
Regarding the other 9xxxx devices, we are thinking about moving to QCA9541 based hardware in the future (I actually have one of these for evaluation GL-inet AR300M).
Have you had any experience with them? Do they have their own set of quirks similar to the AR9331?
Thanks again for your help!
Hello David,
Just an update on my part, we ran a set of tests across 5 devices over the weekend and they're all running fine. I ran a iPerf test as above on one of the known problematic devices and it survived 15K iterations and didn't miss a beat. :)
I'm having a really busy week... and haven't got time to make some tests on my side. I hope to have some during upcoming weekend and will test also other QC/A SOC based devices. But thanks for information about your side tests!
Regarding the other 9xxxx devices, we are thinking about moving to QCA9541 based hardware in the future (I actually have one of these for evaluation GL-inet AR300M).
I suppose that you meant QCA9531 (later changed to QCA4531). Support for SPI NAND is on my TODO list, but there is problem with such memories in kernel side... take a look here: https://github.com/lede-project/source/pull/272
And, if you are thinking about moving to a different SOC, IMHO you should consider also MediaTek, especially MT7628.
Have you had any experience with them? Do they have their own set of quirks similar to the AR9331?
Of course, QCA953x is supported in this project for some time already. During last weeks I have pushed support for several new devices like Wallys DR531, Zbtlink ZBT-WE1526 or Comfast CF-E320N v2 and CF-E520.
I haven't heard about any problems with QCA953x which would require some quirks or custom handling in code. But, they are definitely not as energy-efficient as AR933x, but faster and with 2T2R radio.
Cheers, Piotr
qca_dram_cas_lat(void) function is returning reg/2 shouldnt it return reg-1/2 when latency is set to 2xCAS+1?
