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Full replacement for quartus?

Open gabonator opened this issue 3 years ago • 0 comments

How far is this project to be a full replacement for quartus? I am desperately looking for any resources for AG1KLPQ48 - I can see inalta_sim.v that there is declaration of module module alta_spi but when I instantiate it in my design, supra fails during synthesis with Error: Segmentation Fault., it fails both on windows as well on linux. Last messages from supra give a clue:

Error: instance_spi has no corresponding resource in the device, ignored.
Info: instance_spi|Scko is identified as a clock gate signal.

I would like to verify whether this chip has a real SPI IP or if I need to use software/verilog implementation in order to use SPI. In my workflow I am building with portable version of quartus 13.1 & supra 2019.10.b0 on linux cloud with simple HTTP nodejs service running following commands (sed is to suppress randomization):

af -B --setup --mode QUARTUS --design app --device AG1KLPQ48 -X "set DEVICE_FAMILY 1"
for d in *.tcl ; do
  sed -i 's/rand()/0/g' $d
  sed -i 's/set_seed_rand/#set_seed_rand/g' $d
  sed -i 's/\$seed_rand//g' $d
done
quartus_map --read_settings_files=on --write_settings_files=off app -c app
quartus_sh -t af_quartus.tcl
af -B --batch --mode QUARTUS -X "set QUARTUS_SDC true" -X "set FITTING timing_more" -X "set FITTER full" -X "set EFFORT highest" -X "set HOLDX default" -X "set SKEW basic"

What kind of peripherals are included in AG1KLPQ48 (besides of alta_bram, that one is working well for me)?

gabonator avatar Dec 30 '22 00:12 gabonator